Picking the Right Form Factor

Just because there’s more real estate and functions embedded into chips doesn’t mean it’s any easier to design a device.

Choosing the right form factor has always been a challenge. Think back to 1982, when Adam Osborne introduced the first mass-produced portable computer—the 24.5-lb. Osborne 1. Ever since then, companies have struggled to get the size of the device small enough to make it easily portable, large enough to contain a full-size keyboard, or light enough to make it easy to transport. The shrinking of components—particularly semiconductors—has only expanded the possibilities. Each new process node has created more real estate on a piece of silicon as components and line widths shrink. This trend has made it possible for more functions to be added onto the same chip rather than different chips or chipsets. What was once a cell phone is now also a camera, music player, and text-messaging device.

In places like Japan and Korea, where high bandwidth is available for a workforce that heavily relies on mass transit, the cell phone also contains a portable television. Over the next couple of years, it will most likely contain a Global Positioning System (GPS) as well. For those who still need a keyboard, netbooks and other scaled-down computers have begun hitting the market at remarkably low prices. In the near future, there will be more touchscreen versions of these devices.

What has changed at the most fundamental level is that form factor is no longer limited just by the size or shape of the components. Many of the components are now embedded into other components. Or they are so small as to be almost inconsequential to the overall physical design of a device. Instead, the limiting factors are becoming less visible—and sometimes much more difficult to manage.

Functions Up, Power Down

At the architectural level, one of the most pressing issues that engineers have to wrestle with is the power budget. Even with plug-in devices, there’s a big push to reduce power when a device or portion of a device is not in use. Given the choice between a product that draws lower power and one that offers better performance, many consumers and businesses now choose the lower-power option.

This preference is even more apparent in mobile devices. No one wants a full-function device that won’t last through the day without a recharge. And that means one charge per day regardless of how many functions are actually used. Given the snail’s-pace progress in battery technology, however, getting power usage low enough has created some interesting tradeoffs.

One solution is to add more function-specific heterogeneous cores to a device rather than expanding with homogeneous cores. A second is to add more embedded microcontrollers into a single chip to accomplish roughly the same thing. Dominic Pajak, product manager for ARM’s new M0 microcontroller, says that there are multiple microcontrollers being added into single chips to allow various form factors to use very low power and put them into deep sleep when they’re not in use.

“At the 180-nm process, leakage is as little as 47 microamps on active power and it requires just 50 nanoamps for state retention,” Pajak states. “These devices are active for very small periods of time, so the average current consumption is very low. What we also find is that average power consumption is lower for a 32-bit operation than an 8-bit multicycle operation because a 32-bit microcontroller can do more in one cycle.” On smart utility meters, for example, a 32-bit microcontroller uses half the cycles of a 16-bit microcontroller. And in a touchscreen, an 8-bit microcontroller cannot handle the complexity required for high resolution and a large screen.

Market Reach

It’s precisely this blend of complexity and low power that became the next battleground for most of the major chip companies—all of which have a stake in the high end of the microcontroller world. Intel has targeted this market as a huge opportunity for its Intel® Atom™ processor. “The microcontroller space is 1 to 2 W for the total platform,” states Jonathan Luse, director of marketing for Intel’s low-power Embedded Products Division. “What’s interesting is a lot of those types of applications are purpose driven, so they may not have flexibility in their software stack. There’s a big separation in this space. Some applications are connected in intelligence while there are some relatively static machines in the embedded world.”

Although the Intel Atom processor currently runs at 2 W, Luse says there’s room to drive down the power. “There are things we can do at the silicon level to strip out milliwatts. But one thing you have to consider is that if your platform is running at a low power level, you pay penalties at the board level.” Intel is betting big that the versatility of the Intel® architecture software stack will allow Intel Atom processor to be more versatile than microcontrollers in everything from medical supersuits—basically a scaled-down Iron Man-type of approach for injured patients—to wearable PCs for the military, automobiles, and even handheld devices.

Moving Up The Bar

Just because there’s more room on a chip doesn’t necessarily mean that there’s more room on the board or in the overall design. Doug Sandy, senior staff technologist at Emerson Network Power, emphasizes that adding performance—often with hardware accelerators in systems-on-a-chip—is now a prerequisite to winning contracts. With that comes a linear increase in memory density, which is increasing far faster than it is shrinking. “Memory density does not follow Moore’s Law,” he says. “You can scale linearly for performance. But for small form factors, that creates a challenge. You want to get as much memory as possible, but you can’t increase memory density beyond a certain point.”

A second challenge is that as more real estate becomes available at each node, the processor currently in use may not be too large or too powerful at the next process node. Just because you use a semiconductor at 65 nm doesn’t mean it’s the optimal processor for the same application when it’s manufactured using a 45-nm process. Finding a replacement isn’t always so simple.

Nor does one design work in all markets. In some markets, such as the medical field, many designs have to span a decade to recoup a reasonable return on investment because volumes are relatively low. “There’s always a question of how small it needs to be,” says Christine Van De Graaf, product manager for the Embedded Modules Division of Kontron. “But we also have to ask how much customization it needs. Are there special connectors that are needed or can it fit into a docking station where you can use pins rather than specialized connectors? There’s a lot of special stuff that is application-specific. And when you look at it from the printed-circuit-board (PCB) level, it’s even more complex.”

Finally, there’s a question of just how portable the software will be from one version to another. Art Swift, vice president of marketing at MIPS, points out that the big challenge in many cases is moving content from one platform to the next. “It’s all about leveraging the installed base,” he says.

The bottom line: Just because it’s possible to shrink components doesn’t mean it makes building a device any easier. The constraints on physical form factors at the macro level have given way to constraints, challenges, and rising complexity at the micro level. And those challenges will only get worse as components continue to shrink.

Ed Sperling is Contributing Editor for Embedded Intel® Solutions and the Editor- in-Chief of the “System Level Design” portal. Ed has received numerous awards for technical journalism.