Optimizing In-System Production Programming for the Intel® Serial Flash Memory (S33)

By Data IO

Introduction

Serial Memory devices are dominant in electronic designs due to their high performance and low cost. Products using Serial Memory also have the benefit of In-System Programmability (ISP) which integrates programming and testing into a single production phase and allows for the possibility of code change in the middle of a manufacturing run. But in order to take advantage of these capabilities considerations must be made at the PCB design step. Manufacturing products containing Serial Memory devices can appear deceptively straight-forward, but taking note of some simple guidelines can ensure first-run success.

This document discusses PCB design guidelines and example scenarios using Intel® Serial Flash Memory (S33) devices and the Data I/O ImageWriter™.

Start with PCB Design

If programming isn't considered during PCB design, production may receive boards with devices that are difficult or impossible to program in-system. Fortunately for Serial Memory devices, a few guidelines help with designing manufacturing facilities on the PCB for programmability.

Guideline #1: Design for Programming Pin Access

PCB designs must allow adequate access to the device manufacturers' specified programming pins. At a minimum the programming pins should have test points so access is easy in a test fixture. SPI Serial Memory devices use a minimum of four programming pins: Data In, Data Out, Clock, and Chip Select.

Guideline #2: Provide Power to the Memory Device

Vcc must be present on the board at the proper levels and must be provided to the Serial Memory device. Other on-board circuitry can be a major influence. In some cases the board may be partially powered during ISP operations, but the design must be compatible to do so.

Guideline #3: Design for Contention

It is important to make sure the in-system programming equipment has unfettered electrical access to the device to be programmed. In most designs a Serial Memory device will be connected to a processor or other logic device. This presents a possibility for contention on the shared I/O lines between the Serial Memory and the other processor or device. For example,
problems often arise if a reset-generator is connected to the other processor or the device and is not isolated during the programming process. Additional potential contention issues include an LED that draws too much current for the ISP equipment's drivers, capacitors that create potentially slow edges, or invertors which produce conflicting signals. Many of these issues can be solved with the addition of series resistors and buffers. The most elegant PCB design solutions will simply ensure that I/O pins are high impedance (high-Z).

Intel® Serial Flash Memory (S33) and ImageWriter

Intel has introduced a line of high-density, high-performance Serial Memory devices with features that can easily shave seconds off a production line when properly implemented. ISP Process optimizations with Data I/O ImageWriter and Intel Serial Flash Memory S33 devices dramatically improve throughput.

Initial Data Setup

The basic manufacturing challenge with programming is verifying that unique data is programmed at the right time in the correct places. A high quality process will yield consistent and controllable results.

ImageWriter implements dual memory architecture with Static Data separated from Dynamic Data. This separation allows a one-time setup of Static Data and verification that checksum or CRC32 results are correct on the data section that doesn't change. IW Tools (software included with ImageWriter) can be used to download any type of formatted or raw binary data file to Static Memory prior to manufacturing.

Meanwhile, custom data that varies with each PCB being programmed is downloaded and stored within ImageWriter's Dynamic Memory prior to each programming operation.

Sectors and Erase Considerations

The first consideration in your programming process is whether your target device is erased. If there is any chance you will be reprogramming sectors that are not in the blank state (all locations 0xFF), then you need to ensure your programming flow will erase the device appropriately. On the other hand, if you know for certain that devices will be 100% blank, then you can recover valuable time (often 10-40 seconds) by omitting the erase step.

There are two types of erase operations supported on Intel Serial Flash Memory S33 devices: Chip Erase, which globally erases all sectors; and Sector Erase, which erases an individual sector at a time. If partial programming is being performed and time is critical, Sector Erase is preferable to Chip Erase. The ImageWriter Device Object "Chip Erase" has the same size as the Flash Array and works by calling the Program method and sending the address parameter within the sector to be erased. Likewise the Memory Start parameter can be any valid value. The ImageWriter will only erase one sector per program command; therefore, to erase multiple sectors you simply send as many Program commands as needed for the number of sectors to be erased.

Partial Data Programming

If the amount of data being programmed into the device is smaller than the total device size, then a partial block-size operation can be used to save time. The starting address in the device can be any valid address, even if it is not on a page-boundary.

After programming verification can be optimized by checking
only the partially programmed blocks or verify can be
performed on the entire device to ensure the remainder of the data setup is in proper order. In situations where multiple configurations are being used, multiple verification images can be stored in ImageWriter's Static Memory.

Interleaving Program and Verify steps allows programming failures to be detected as quickly as possible in the process. If all Verify steps are performed after programming, the same end result is achieved if the device passes. However, if the device fails, the total process time could be longer. Keep this in mind when setting up your programming flow in IW Tools.

ImageWriter supports per-byte resolution for most programming operations on most Device Objects. This means you can program data at any address in the device in contiguous chunks. One of the most powerful aspects of ImageWriter's use model allows for excellent process flexibility. In cases where object block limits are "locked" you will receive "Error 0813: No partial block limits can be set on this object" if you attempt to program a partial object size. Often, Configuration or ID type Device Objects will have locked block limits, while Flash or other "main-array" sections of the device will not.

OTP Special Data Programming

OTP regions are often used to enhance security of a system design by enabling unchangeable serialization and unique data programming, allowing for fraud protection through the tracking capabilities a unique identifier provides.

The S33 Intel Serial Flash Memory contains two 8-Byte, thirty 16-Byte, and one 10-Byte individually lockable OTP (one-time-programming) regions, in addition to read-only 64 bit unique factory device identifier. Once the accessible customer sections are programmed, each one can be individually locked to prevent further re-programming. These regions are contained within an address space that is separate from the Main Array and used by ImageWriter as the "Flash OTP" Device Object.

Because of these enhanced security needs and the nature of the dynamic data, ISP is greatly favored. Programming of the OTP sectors can be folded into the same process as the static primary memory sections, and completed as near the end of the manufacturing process as possible. ImageWriter provides fast and reliable programming of custom data through use of its dual memory-architecture where Static Data is separated from Dynamic Data.

Programming of the OTP sectors is accomplished through a "Flash OTP" object in an IW flow. For this object, the block limits are "locked" and you will receive an error message if you attempt to program a partial object size with the OTP section. This also means that you must use an image file that matches the entire OTP memory map which contains overlaid 0xFF values for any protection registers you do not wish to set. The INTEL reserved area, containing the 64 bit unique factory device identifier, can be loaded but will not affect verify operations in any way.

For more information on ImageWriter, please explore the ImageWriter Integration Guide or visit our ISP webpage at www.dataio.com/isp.

For more information on Intel® Serial Flash Memory (S33), please visit Intel's webpage at: www.developer.intel.com/design/flcomp/prodbref/s33.htm.

Contact Information

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