PCI Express Versus RapidIO: The Winner Is…

By Dave Barker, Extreme Engineering Solutions (X-ES)

The debate known as the “fabric wars” started around the turn of the century and has been raging ever since. Over the past decade, there have been dozens of entries vying to be the system-interconnect fabric for embedded systems. Who can forget Advanced Switching Interconnect (ASI), StarFabric, Hyper Transport, InfiniBand, and Parallel RapidIO? Now, the list of contenders is down to just three: 10 Gigabit Ethernet (10 GbE), RapidIO, and PCI Express (PCIe).

Ethernet isn’t going away. RMDA support is part of the 10 GbE specification and cut-through switches are becoming available. (Here, the switch starts forwarding a packet before the whole packet has been received, as opposed to store-andforward switches.) Clearly, 10 GbE will serve the needs of many applications. It will take some time, however, before 10 GbE is ready for the heavy lifting of the data plane for highend applications.

Until then, RapidIO and PCIe are the most viable highperformance, low-latency, low-overhead, embedded-systems interconnects. RapidIO has been seen by many to be technically superior—primarily because of its peer-to-peer support. PCIe was designed as a serial replacement for the parallel PCI bus. At the software level, PCIe preserves compatibility with PCI. To use PCIe in embedded applications with multiple, independent CPU subsystems, non-transparent bridging is required (just as CompactPCI required non-transparent PCI bridging).

The best technology doesn’t always win, however. One of the most famous examples of this is Betamax versus VHS. (For you younger readers, these are the video-tape formats that predate DVDs.) Videophiles recognized that the quality of Betamax video was superior. But VHS won out due to a longer record time, which the market wanted.

The embedded market is leveraging the PCIe infrastructure from the PC world, which is analogous to how it leveraged the PCI bus infrastructure. All new 32- and 64-bit processors support PCIe. In addition, I/O controllers and devices that previously had PCI bus interfaces have migrated to PCIe endpoint interfaces. PCIe switch chips from a number of companies are on the market. Even field-programmable gate arrays (FPGAs) include hard-coded PCIe endpoint cores.

The picture for RapidIO is much different. The majority of companies that implement RapidIO in silicon are processor or DSP companies, for which RapidIO is a very good interconnect. There are far fewer switch options available. Overall, the RapidIO ecosystem is much smaller than the PCIe ecosystem.

In this competition, success is all about market share. Because of the PC market, PCIe has market share while RapidIO does not. By itself, the embedded-computing market isn’t big enough to make a market for an interconnect technology that lives within a chip. Several years ago, this point was made clear to me at a RapidIO Trade Association meeting. We were discussing the future of RapidIO prior to the release of the RapidIO 2.0 specification. Several CPU vendors present said the only way that they could support RapidIO in their chips was if it continued to stay in lockstep with PCIe and leverage the same lower layers of the protocol (e.g., 8b/10b encoding) and SERDES. Otherwise, there wasn’t enough market demand to justify implementing RapidIO at the expense of another feature. Even though RapidIO was technically sound, I realized that it couldn’t win in the market over PCIe.

Since then, a number of advancements have made PCIe very relevant for embedded applications. PCIe switches are becoming available, which allow multiple non-transparent ports to be configured. PCIe 2.0 was ratified in 2007, doubling the data rate to 5.0 Gb/s. With proper software support, processors in embedded systems can communicate over PCIe as peers in a network. In late 2010, the PCI SIG made the PCIe 3.0 specification available to members.

It’s time to declare the fabric war over. And the winner is PCIe—for now. Depending on the longevity of PCIe and the viability of 10 GbE, the landscape may look different in a few years. But the next big debate may be over optical interconnects. Ready for the “optical war?”

Dave Barker is the director of marketing at Extreme Engineering Solutions (X-ES). Previously, he headed marketing and business development at VMETRO and was the VME product manager at the Motorola Computer Group. Barker has a BS in computer science from the University of Pittsburgh and an MBA from the University of Phoenix.